System Administration, Reconfigurable Computing and Other Random Topics

Stuck UART on the ZedBoard

Recently I grabbed my trusted old Avnet / Digilent ZedBoard to test how well the current Xilinx tools work with this now a decade old platform. However, I was facing a weird issue: The serial output by the Zynq PS was only received via USB on my computer when I was sending characters via UART from my computer to the PS as well. As soon as there was a pause in communication, any further serial output by the PS was silently dropped.

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XPS on RHEL 7 / CentOS 7

Officially the ISE suite is not supported to run on RHEL / CentOS 7. But since time moves on and Vivado nowadays is supported on those systems you may be tempted to run the ISE tools on this system as well.

If you face the issue that XPS just shows a blank window and even XPS project files are opened as text files, the following will probably solve this issue:

yum install mesa-libGLU

By now this was also mentioned on a Xilinx forum thread but I thought I’d post it anyway.

Zynq ACP AxCACHE & AxUSER signals

If you want to use the AXI_ACP interface on a Xilinx Zynq SoC for coherent memory access from the PL, you have to set the AxUSER and AxCACHE signals accordingly. Unfortunately the Zynq TRM in section 3.5.1 only tells you how to set ARUSER[0]ARCACHE[1] and AWUSER[0]AWCACHE[1], respectively. So, what to do with the other bits?

Posts in the Xilinx forums suggest that most people just set all bits of AxUSER and AxCACHE to 1 and this typically works. For a description of all possible values have a look at ARM’s documentation for the Cortex-A9 and PL 310 IP cores that are used in the Zynq SoC: